 | 26 Sep 2005 Updated 14 Dec 2006 As a system-on-chip (SoC) designer facing the challenges of today's advanced technologies, system-level design tools that allow you to make informed decisions early in the design process can be the difference in getting products to market quicker. The ability to quickly evaluate the cross-domain effects of design trade-offs on performance, power, timing, and die size gives a huge advantage much earlier than was ever achievable with traditional design techniques.
System requirements
Red Hat Enterprise Linux® 3.0
What's new in this release
PEK 2.0 provides a new way to add SystemC models to the library and offers the following tool enhancements:
- Complete SystemC 2.1 support
- A programmable PLB master model, called perf_cpu (that allows multithreaded applications to execute on the PLB bus TL model)
- ddr_mc2plb4_module_es -- A cycle accurate version of the memory controller model
- UART16750_Serial and UART16750_Byte, new UART models having byte and serial interfaces
- A console model attached to the UART models, to facilitate user interaction with code running on the iss
- Support for network execution capability (the current version permits multiple copies of PEK to be executed on the same machine)
- Ability to perform power estimation of software applications executing on the PPC405/CoreConnect™ platform during simulation (power estimation is currently enabled for a typical 130nm process technology)
- Embedded software profiling: power, duration, and instruction counts of each high-level function present in the embedded application can be measured and visualized
- Provision for selective profiling of the applications
- Graphical visualization of simulation attributes in different formats (bar, pie, time-value, (and so on) plots)
- Several new demo examples that show the use of the new cycle-accurate memory controller, a dma controller, programmable PLB master, UART, and console models
- Several schematic GUI enhancements
Note:
Beginning with this 2.0 release, SystemC libraries will not be shipped as a part of the PEK packaging. Download SystemC from the "More downloads" section below and make it a part of the PEK package using the sc_install script provided in this release.
Additional details
Who
Software engineers interested in developing boot firmware, operating system, or application code for a PowerPC-based chip.
Hardware engineers or SoC architects interested in architecture decision support, early benchmarking, or high-level system design trade-offs.
What
The IBM PowerPC 405 Evaluation Kit
Why
The PEK enables designers to evaluate, build, and verify SoC designs. The first version of this kit is an SoC analysis framework which includes the IBM ChipBench™ System Level Design (ChipBench SLD) tool and a set of SystemC transaction-level architecture models. These models are designed to enable embedded software development and performance analysis for consumer applications based on Power Architecture™ technology.
The PEK includes:
- IBM SystemC transaction-level models for PowerPC 405 and CoreConnect intellectual property (IP) cores
- A 60-day downloadable evaluation license of the IBM ChipBench SLD, allowing early architectural and performance analysis
- IBM RISCWatch debugger tool
- Pre-integrated SoC platform examples for architecture exploration and extensions
- Sample application code with tutorial
- Enabled-for-GNU-project C compiler (GCC) tool chain
- Reference SW API documentation
- Reference technical manual and functional specification documents, including:
- PPC405Fx Embedded Processor Core Specification
- Universal Interrupt Controller Specification
- DDR2MC1632B2PLB4 Functional Specification
- Universal Asynchronous Receiver/Transmitter 16750 Specification
- 128 Bit Processor Local Bus Architecture Specification
- 64/32-Bit On-Chip Peripheral Bus Architecture Specification
- 32-Bit Device Control Register Architecture Specification
- 32-Bit On-Chip Peripheral Bus Arbiter Specification
Where
Only at the IBM developerWorks Power Architecture technology zone
How
Access both the PEK and the 60-day license from the HTTP link in the Download table below;
free, simplified registration is required. When your license expires, return to this page and click the HTTP link to download a refreshed version. Post questions about these models to this Power Architecture technology forum.
Download | Description | Name | Size | Download method |
|---|
| PowerPC405 Evaluation Kit and license | PEK.tar.gz and PEK.lic | 57.7MB | HTTP |
|---|
More downloads
Resources
|  | |  |